Semiconductor design settlement navigator
Every European chip-design incentive. One filtered view.
Fiscal instruments, funding, visa pathways and legal steps are scattered across tax codes, EU regulations and program sites that don't reference each other. ChipSettle assembles them — verified, dated, source-linked — and filters them to your profile.
34 verified instruments 5 countries + EU legal basis + source on every entry no AI-generated answers
01
Describe your company
- HQ, business model, size, revenue
- Sectors + end-market industries
- Goal: design site · R&D · IP · pilot lines
02
Get your dashboard
- Deterministic engine, not a chatbot
- Filtered to your profile
- Eligibility + relevance per instrument
03
Compare & act
- Side-by-side across countries
- Support estimate + action roadmap
- Export PDF for your board
Coverage
- 🇩🇪 Germany ✓ verified
- 🇳🇱 Netherlands ✓ verified
- 🇧🇪 Belgium ✓ verified
- 🇫🇷 France ✓ verified
- 🇪🇸 Spain ✓ verified
- 🇮🇪 Ireland planned
- 🇮🇹 Italy planned
- 🇦🇹 Austria planned
- 🇪🇺 EU level ✓ verified
Recent & upcoming changes
- 1 Jan 2027 🇳🇱NL expat ruling: tax-free share 30% → 27% upcoming
- 1 Jan 2026 🇩🇪DE Forschungszulage: base cap → €12M + 20% overhead flat rate
- 1 Jan 2026 🇳🇱NL WBSO: first bracket → €391,020 (rates 36% / 16%)
- 28 Feb 2025 🇫🇷FR JEI: R&D-spend threshold raised 15% → 20%
- 15 Feb 2025 🇫🇷FR CIR: base narrowed (operating-cost rate 43% → 40%)
- 1 Jan 2025 🇧🇪BE inbound-taxpayer regime: allowance 30% → 35%, cap dropped